The present invention relates to a semiconductor device, an electronic control system, and a method for evaluating the electronic control system. For example, the present invention relates to a semiconductor device to which functional safety is applied as well as a system including the semiconductor device.
For example, Patent Document 1 (Japanese Unexamined Patent Application Publication No. Hei 1(1989)-169640) discloses a method for generating false failures in an information processing device. More specifically, during the normal operation of an information processing device, a scan control unit forcibly scans predetermined data in a specific scan flip-flop within the information processing device. At this time, an address comparison circuit determines the timing of the scan-in operation by detecting that the value of a micro-instruction address register matches a predetermined address. Then, a decoder circuit decodes the predetermined scan address to identify the scan flip-flop which is the scan-in target.